Problem

1. Noise-induced barren plateaus [S. Wang et al., 2021] in VQAs limit trainability of Quantum Neural Networks

   

2. Error mitigation techniques and their requirements

   

   See NEPEC paper by Mari et al. (2021), and EM Noisy VQA paper by Wang et al. (2021) for limitations

   • vnCDR [A. Lowe, 2021]: ZNE + CDR outperforms the individual methods on QAOA

Gaps

Aim: We want to design a CQ QNN which adopts Error Mitigation Techniques with the following properties

1. Robust with high depths i.e. doesn’t result in NIBPs
   1. Could try vnCDR related techniques [Lowe et al., 2021]?
      1. Since in some settings CDR has a neutral effect on the resolvability of the cost function landscape [Wang et al, 2021]
2. Without having to do gate set tomography which is expensive
3. Able to account for coherent and incoherent errors
   1. Combine with Randomized Compiling / Pauli Twirling [Hashim et al., 2020]?
      1. While Hashim et al. didn’t try to ‘twirl’ rotation gates (non-Pauli gates), could it work for VQCs?
      2. Or at least, we twirl the Pauli gates i.e. $\mathbb P = {\{I, X, Y, Z\}}$ only – to mitigate some coherent noise?
      3. Since unified aka combined techniques known to work [Lowe et al., 2021]

Inspirations

Extending quantum probabilistic error cancellation by noise scaling (NEPEC)

Andrea Mari, Nathan Shammah, and William J Zeng, “Extending quantum probabilistic error cancellation by noise scaling,” arXiv preprint arXiv:2108.02237 (2021).

Existing work

1. Zero-noise extrapolation (ZNE) [7, 10, 11]: quantum observable is measured at different noise levels (by artificially increasing the hardware noise) and extrapolated to the zero-noise limit

   1. Fixed circuit evaluated at different noise levels
   2. No need to know the details of the noise model
   3. Can use pulse-stretching [7] or unitary gate folding
   4. The statistical uncertainty $\gamma$ scales exponentially wrt size of the set of scale factors $S$ (in the case of Richardson extrapolation)
      1. In practice implies that only a few noise scale factors must be used to avoid numerical instabilities
      2. In general, the number of terms in the linear combination is small and one can directly measure all the noisy expectation values.
      3. This means that, in the case of ZNE, it is not necessary to use any probabilistic Monte Carlo sampling.

2. Probabilistic error cancellation (PEC) [7, 8, 12]: ideal circuits are approximated with a Monte Carlo average over different noisy circuits.

   1. Set of different circuits evaluated at the same level of noise (that of hardware)
   2. Must know the details of the noise model
   3. [18]: a modified version of the PEC technique is proposed in which the statistical variance of the estimator can be reduced at the cost of introducing a bias error

   

   

   • The one-norm $\gamma_i$ is related to the PEC sampling cost, we we want to minimize it!

   

   • The number of terms in Eq. (6) grows exponentially with respect to the number of gates t and, in most practical situations, this approach is unfeasible

   • To avoid this, replace the sum in Eq. (6) with a Monte Carlo approximation [7, 8, 20, 21]:

     

     • Number of samples ∝ $\gamma^2 \over \delta^2$, where $\delta$ is the precision, $\gamma = \Pi_i\gamma_i$
     • Higher the negativity / one-norm of the quasi-distribution, the higher the PEC sampling cost: $\gamma$ scales exponentially with the number of gates
     • But PEC can still be very advantageous with the medium-size circuits which can run on near-term quantum computers [12].

3. Clifford Data Regression (CDR) [15]

   

   

   • N grows polynomially with the number of qubits.

   • Single gate pulses $P$ and CNOT gates are Clifford gates.

   • Rotation gates are generally non-Clifford, however the $S=R_Z({\pi \over 2})$ is.

   • Example: QAOA for Quantum Ising Model

     

     

     

   • Random Quantum Circuits Mitigation

     

     

4. Virtual Distillation [16, 17]

5. ML approach [13, 14]: an inference model is first trained with a dataset of classically-simulable circuits and, as a second step, is applied to the circuit of interest.

NEPEC (General) Techniques